Curtis A. Nelson, Chris J. Myers, Tomohiro Yoneda. Efficient Verification of Hazard-Freedom in Gate-Level Timed Asynchronous Circuits. In 2003 International Conference on Computer-Aided Design (ICCAD 03), November 9-13, 2003, San Jose, CA, USA. pages 424-432, IEEE Computer Society / ACM, 2003. [doi]
Abstract is missing.