A two-tier memory architecture for high-performance multiprocessor systems

Tam M. Nguyen, Vason P. Srini, Alvin M. Despain. A two-tier memory architecture for high-performance multiprocessor systems. In ICS. pages 326-336, 1988. [doi]

@inproceedings{NguyenSD88,
  title = {A two-tier memory architecture for high-performance multiprocessor systems},
  author = {Tam M. Nguyen and Vason P. Srini and Alvin M. Despain},
  year = {1988},
  doi = {10.1145/55364.55396},
  url = {http://doi.acm.org/10.1145/55364.55396},
  tags = {architecture},
  researchr = {https://researchr.org/publication/NguyenSD88},
  cites = {0},
  citedby = {0},
  pages = {326-336},
  booktitle = {ICS},
}