Vernier ring based pre-bond through silicon vias test in 3D ICs

Tianming Ni, Mu Nie, Huaguo Liang, Jingchang Bian, Xiumin Xu, Xiangsheng Fang, Zhengfeng Huang, Xiaoqing Wen. Vernier ring based pre-bond through silicon vias test in 3D ICs. IEICE Electronic Express, 14(18):20170590, 2017. [doi]

Abstract

Abstract is missing.