Philipp Niemann 0001, Rolf Drechsler. Polynomial-Time Formal Verification of Adder Circuits for Multiple-Valued Logic. In 52nd IEEE International Symposium on Multiple-Valued Logic, ISMVL 2022, Dallas, TX, USA, May 18-20, 2022. pages 9-14, IEEE, 2022. [doi]
@inproceedings{NiemannD22,
title = {Polynomial-Time Formal Verification of Adder Circuits for Multiple-Valued Logic},
author = {Philipp Niemann 0001 and Rolf Drechsler},
year = {2022},
doi = {10.1109/ISMVL52857.2022.00009},
url = {https://doi.org/10.1109/ISMVL52857.2022.00009},
researchr = {https://researchr.org/publication/NiemannD22},
cites = {0},
citedby = {0},
pages = {9-14},
booktitle = {52nd IEEE International Symposium on Multiple-Valued Logic, ISMVL 2022, Dallas, TX, USA, May 18-20, 2022},
publisher = {IEEE},
isbn = {978-1-6654-2395-3},
}