Thomas M. Niermann, Wu-Tung Cheng, Janak H. Patel. Proofs: A Fast, Memory Efficient Sequential Circuit Fault Simulator. In DAC. pages 535-540, 1990. [doi]
@inproceedings{NiermannCP90,
title = {Proofs: A Fast, Memory Efficient Sequential Circuit Fault Simulator},
author = {Thomas M. Niermann and Wu-Tung Cheng and Janak H. Patel},
year = {1990},
doi = {10.1145/123186.123396},
url = {http://doi.acm.org/10.1145/123186.123396},
researchr = {https://researchr.org/publication/NiermannCP90},
cites = {0},
citedby = {0},
pages = {535-540},
booktitle = {DAC},
}