A 45-nm Bulk CMOS Embedded SRAM With Improved Immunity Against Process and Temperature Variations

Koji Nii, Makoto Yabuuchi, Yasumasa Tsukamoto, Shigeki Ohbayashi, Susumu Imaoka, Hiroshi Makino, Yoshinobu Yamagami, Satoshi Ishikura, Toshio Terano, Toshiyuki Oashi, Keiji Hashimoto, Akio Sebe, Gen Okazaki, Katsuji Satomi, Hironori Akamatsu, Hirofumi Shinohara. A 45-nm Bulk CMOS Embedded SRAM With Improved Immunity Against Process and Temperature Variations. J. Solid-State Circuits, 43(1):180-191, 2008. [doi]

@article{NiiYTOIMYITOHSO08,
  title = {A 45-nm Bulk CMOS Embedded SRAM With Improved Immunity Against Process and Temperature Variations},
  author = {Koji Nii and Makoto Yabuuchi and Yasumasa Tsukamoto and Shigeki Ohbayashi and Susumu Imaoka and Hiroshi Makino and Yoshinobu Yamagami and Satoshi Ishikura and Toshio Terano and Toshiyuki Oashi and Keiji Hashimoto and Akio Sebe and Gen Okazaki and Katsuji Satomi and Hironori Akamatsu and Hirofumi Shinohara},
  year = {2008},
  doi = {10.1109/JSSC.2007.907998},
  url = {https://doi.org/10.1109/JSSC.2007.907998},
  researchr = {https://researchr.org/publication/NiiYTOIMYITOHSO08},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {43},
  number = {1},
  pages = {180-191},
}