Spiridon Nikolaidis, Nikolaos Kavvadias, T. Laopoulos, Labros Bisdounis, Spyros Blionas. Instruction Level Energy Modeling for Pipelined Processors. In Jorge Juan-Chico, Enrico Macii, editors, Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation, 13th International Workshop, PATMOS 2003, Torino, Italy, September 10-12, 2003, Proceedings. Volume 2799 of Lecture Notes in Computer Science, pages 279-288, Springer, 2003. [doi]
Abstract is missing.