V. A. Niranjan, Deepika Neethirajan, Constantinos Xanthopoulos, E. De la Rosa, C. Alleyne, S. Mier, Yiorgos Makris. Trim Time Reduction in Analog/RF ICs Based on Inter-Trim Correlation. In 39th IEEE VLSI Test Symposium, VTS 2021, San Diego, CA, USA, April 25-28, 2021. pages 1-7, IEEE, 2021. [doi]
Abstract is missing.