An FPGA Accelerator for Bayesian Network Structure Learning with Iterative Use of Processing Elements - researchr publication

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Yasuhiro Nitta, Hideki Takase. An FPGA Accelerator for Bayesian Network Structure Learning with Iterative Use of Processing Elements. In International Conference on Field-Programmable Technology, (IC)FPT 2020, Maui, HI, USA, December 9-11, 2020. pages 29-34, IEEE, 2020. [doi]

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