Early stage power management for 3D FPGAs considering hierarchical routing resources

Krishna Chaitanya Nunna, Farhad Mehdipour, Kazuaki Murakami. Early stage power management for 3D FPGAs considering hierarchical routing resources. In José Luis Ayala, Alex K. Jones, Patrick H. Madden, Ayse Kivilcim Coskun, editors, Great Lakes Symposium on VLSI 2013 (part of ECRC), GLSVLSI'13, Paris, France, May 2-4, 2013. pages 31-36, ACM, 2013. [doi]

Abstract

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