Timing- and Constraint-Oriented Placement for Interconnected LSIs in Mainframe Design - researchr publication authors

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Yasushi Ogawa, Tsutomu Itoh, Yoshio Miki, Tatsuki Ishii, Yasuo Sato, Reiji Toyoshima. Timing- and Constraint-Oriented Placement for Interconnected LSIs in Mainframe Design. In DAC. pages 253-258, 1991. [doi]

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