A selective error data capture method using on-chip DRAM for silicon debug of multi-core design - researchr publication authors

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Hyunggoy Oh, Heetae Kim, Jaeil Lim, Sungho Kang. A selective error data capture method using on-chip DRAM for silicon debug of multi-core design. In International SoC Design Conference, ISOCC 2017, Seoul, Korea (South), November 5-8, 2017. pages 121-122, IEEE, 2017. [doi]

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