Design technologies for a 1.2V 2.4Gb/s/pin high capacity DDR4 SDRAM with TSVs

Reum Oh, ByungHyun Lee, Sang-Woong Shin, Wonil Bae, Hundai Choi, Indal Song, Yun Sang Lee, Jung Hwan Choi, Chi-Wook Kim, Seong-Jin Jang, Joo-Sun Choi. Design technologies for a 1.2V 2.4Gb/s/pin high capacity DDR4 SDRAM with TSVs. In Symposium on VLSI Circuits, VLSIC 2014, Digest of Technical Papers, Honolulu, HI, USA, June 10-13, 2014. pages 1-2, IEEE, 2014. [doi]

Authors

Reum Oh

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ByungHyun Lee

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Sang-Woong Shin

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Wonil Bae

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Hundai Choi

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Indal Song

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Yun Sang Lee

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Jung Hwan Choi

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Chi-Wook Kim

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Seong-Jin Jang

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Joo-Sun Choi

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