Reum Oh, ByungHyun Lee, Sang-Woong Shin, Wonil Bae, Hundai Choi, Indal Song, Yun Sang Lee, Jung Hwan Choi, Chi-Wook Kim, Seong-Jin Jang, Joo-Sun Choi. Design technologies for a 1.2V 2.4Gb/s/pin high capacity DDR4 SDRAM with TSVs. In Symposium on VLSI Circuits, VLSIC 2014, Digest of Technical Papers, Honolulu, HI, USA, June 10-13, 2014. pages 1-2, IEEE, 2014. [doi]
@inproceedings{OhLSBCSLCKJC14,
title = {Design technologies for a 1.2V 2.4Gb/s/pin high capacity DDR4 SDRAM with TSVs},
author = {Reum Oh and ByungHyun Lee and Sang-Woong Shin and Wonil Bae and Hundai Choi and Indal Song and Yun Sang Lee and Jung Hwan Choi and Chi-Wook Kim and Seong-Jin Jang and Joo-Sun Choi},
year = {2014},
doi = {10.1109/VLSIC.2014.6858367},
url = {http://dx.doi.org/10.1109/VLSIC.2014.6858367},
researchr = {https://researchr.org/publication/OhLSBCSLCKJC14},
cites = {0},
citedby = {0},
pages = {1-2},
booktitle = {Symposium on VLSI Circuits, VLSIC 2014, Digest of Technical Papers, Honolulu, HI, USA, June 10-13, 2014},
publisher = {IEEE},
isbn = {978-1-4799-3327-3},
}