Shigeki Ohbayashi, Makoto Yabuuchi, Koji Nii, Yasumasa Tsukamoto, Susumu Imaoka, Yuji Oda, Tsutomu Yoshihara, Motoshige Igarashi, Masahiko Takeuchi, Hiroshi Kawashima, Yasuo Yamaguchi, Kazuhiro Tsukamoto, Masahide Inuishi, Hiroshi Makino, Koichiro Ishibashi, Hirofumi Shinohara. A 65-nm SoC Embedded 6T-SRAM Designed for Manufacturability With Read and Write Operation Stabilizing Circuits. J. Solid-State Circuits, 42(4):820-829, 2007. [doi]
@article{OhbayashiYNTIOY07,
title = {A 65-nm SoC Embedded 6T-SRAM Designed for Manufacturability With Read and Write Operation Stabilizing Circuits},
author = {Shigeki Ohbayashi and Makoto Yabuuchi and Koji Nii and Yasumasa Tsukamoto and Susumu Imaoka and Yuji Oda and Tsutomu Yoshihara and Motoshige Igarashi and Masahiko Takeuchi and Hiroshi Kawashima and Yasuo Yamaguchi and Kazuhiro Tsukamoto and Masahide Inuishi and Hiroshi Makino and Koichiro Ishibashi and Hirofumi Shinohara},
year = {2007},
doi = {10.1109/JSSC.2007.891648},
url = {https://doi.org/10.1109/JSSC.2007.891648},
researchr = {https://researchr.org/publication/OhbayashiYNTIOY07},
cites = {0},
citedby = {0},
journal = {J. Solid-State Circuits},
volume = {42},
number = {4},
pages = {820-829},
}