Satoshi Ohtake, Hiroshi Iwata, Hideo Fujiwara. A synthesis method to propagate false path information from RTL to gate level. In Elena Gramatová, Zdenek Kotásek, Andreas Steininger, Heinrich Theodor Vierhaus, Horst Zimmermann, editors, 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2010, Vienna, Austria, April 14-16, 2010. pages 197-200, IEEE, 2010. [doi]
Abstract is missing.