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A 40-Gb/s CMOS clocked comparator with bandwidth modulation technique

Yusuke Okaniwa, Hirotaka Tamura, Masaya Kibune, Daisuke Yamazaki, Tsz-Shing Cheung, Junji Ogawa, Nestoras Tzartzanis, William W. Walker, Tadahiro Kuroda. A 40-Gb/s CMOS clocked comparator with bandwidth modulation technique. J. Solid-State Circuits, 40(8):1680-1687, 2005. [doi]

Authors

Yusuke Okaniwa

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Hirotaka Tamura

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Masaya Kibune

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Daisuke Yamazaki

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Tsz-Shing Cheung

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Junji Ogawa

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Nestoras Tzartzanis

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William W. Walker

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Tadahiro Kuroda

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