Yusuke Okaniwa, Hirotaka Tamura, Masaya Kibune, Daisuke Yamazaki, Tsz-Shing Cheung, Junji Ogawa, Nestoras Tzartzanis, William W. Walker, Tadahiro Kuroda. A 40-Gb/s CMOS clocked comparator with bandwidth modulation technique. J. Solid-State Circuits, 40(8):1680-1687, 2005. [doi]
@article{OkaniwaTKYCOTWK05,
title = {A 40-Gb/s CMOS clocked comparator with bandwidth modulation technique},
author = {Yusuke Okaniwa and Hirotaka Tamura and Masaya Kibune and Daisuke Yamazaki and Tsz-Shing Cheung and Junji Ogawa and Nestoras Tzartzanis and William W. Walker and Tadahiro Kuroda},
year = {2005},
doi = {10.1109/JSSC.2005.852014},
url = {https://doi.org/10.1109/JSSC.2005.852014},
researchr = {https://researchr.org/publication/OkaniwaTKYCOTWK05},
cites = {0},
citedby = {0},
journal = {J. Solid-State Circuits},
volume = {40},
number = {8},
pages = {1680-1687},
}