A +30.5 dBm CMOS Doherty power amplifier with reliability enhancement technique

Kohei Onizuka, Shigehito Saigusa, Shoji Otaka. A +30.5 dBm CMOS Doherty power amplifier with reliability enhancement technique. In Symposium on VLSI Circuits, VLSIC 2012, Honolulu, HI, USA, June 13-15, 2012. pages 78-79, IEEE, 2012. [doi]

Abstract

Abstract is missing.