Masafumi Onouchi, Tetsuya Yamada, Kimihiro Morikawa, Isamu Mochizuki, Hidetoshi Sekine. A system-level power-estimation methodology based on IP-level modeling, power-level adjustment, and power accumulation. In Fumiyasu Hirose, editor, Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, Yokohama, Japan, January 24-27, 2006. pages 547-550, IEEE, 2006. [doi]
@inproceedings{OnouchiYMMS06,
title = {A system-level power-estimation methodology based on IP-level modeling, power-level adjustment, and power accumulation},
author = {Masafumi Onouchi and Tetsuya Yamada and Kimihiro Morikawa and Isamu Mochizuki and Hidetoshi Sekine},
year = {2006},
doi = {10.1145/1118299.1118430},
url = {http://doi.acm.org/10.1145/1118299.1118430},
tags = {modeling},
researchr = {https://researchr.org/publication/OnouchiYMMS06},
cites = {0},
citedby = {0},
pages = {547-550},
booktitle = {Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, Yokohama, Japan, January 24-27, 2006},
editor = {Fumiyasu Hirose},
publisher = {IEEE},
isbn = {0-7803-9451-8},
}