Embedded memory and ARM Cortex-M0 core using 60-nm C-axis aligned crystalline indium-gallium-zinc oxide FET integrated with 65-nm Si CMOS

Tatsuya Onuki, Wataru Uesugi, Hikaru Tamura, Atsuo Isobe, Yoshinori Ando, Satoru Okamoto, Kiyoshi Kato, T. R. Yew, Chen Bin Lin, J.-Y. Wu, Chi-Chang Shuai, Shao Hui Wu, James Myers, Klaus Doppler, Masahiro Fujita, Shunpei Yamazaki. Embedded memory and ARM Cortex-M0 core using 60-nm C-axis aligned crystalline indium-gallium-zinc oxide FET integrated with 65-nm Si CMOS. In 2016 IEEE Symposium on VLSI Circuits, VLSIC 2016, Honolulu, HI, USA, June 15-17, 2016. pages 1-2, IEEE, 2016. [doi]

@inproceedings{OnukiUTIAOKYLWS16,
  title = {Embedded memory and ARM Cortex-M0 core using 60-nm C-axis aligned crystalline indium-gallium-zinc oxide FET integrated with 65-nm Si CMOS},
  author = {Tatsuya Onuki and Wataru Uesugi and Hikaru Tamura and Atsuo Isobe and Yoshinori Ando and Satoru Okamoto and Kiyoshi Kato and T. R. Yew and Chen Bin Lin and J.-Y. Wu and Chi-Chang Shuai and Shao Hui Wu and James Myers and Klaus Doppler and Masahiro Fujita and Shunpei Yamazaki},
  year = {2016},
  doi = {10.1109/VLSIC.2016.7573504},
  url = {http://dx.doi.org/10.1109/VLSIC.2016.7573504},
  researchr = {https://researchr.org/publication/OnukiUTIAOKYLWS16},
  cites = {0},
  citedby = {0},
  pages = {1-2},
  booktitle = {2016 IEEE Symposium on VLSI Circuits, VLSIC 2016, Honolulu, HI, USA, June 15-17, 2016},
  publisher = {IEEE},
  isbn = {978-1-5090-0635-9},
}