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Alex Orailoglu. Microarchitectural synthesis of gracefully degradable, dynamically reconfigurable ASICs. In 1996 International Conference on Computer Design (ICCD 96), VLSI in Computers and Processors, October 7-9, 1996, Austin, TX, USA, Proceedings. pages 112-117, IEEE Computer Society, 1996. [doi]

The following publications are possibly variants of this publication:

High-level synthesis of gracefully degradable ASICsWah Chan, Alex Orailoglu. date 1996: 50-54 [doi]

On-Line Fault Resilience Through Gracefully Degradable ASICsAlex Orailoglu. et, 12(1-2):145-151, 1998. [doi]

Graceful Degradation in Synthesis of VLSI ICsAlex Orailoglu. dft 1998: 301-311 [doi]

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