Yasuji Oyama, Toshinobu Kanai, Hironobu Niijima. Scan Design Oriented Test Technique for VLSI s Using ATE. In Proceedings IEEE International Test Conference 1996, Test and Design Validity, Washington, DC, USA, October 20-25, 1996. pages 453-460, IEEE Computer Society, 1996.
@inproceedings{OyamaKN96,
title = {Scan Design Oriented Test Technique for VLSI s Using ATE},
author = {Yasuji Oyama and Toshinobu Kanai and Hironobu Niijima},
year = {1996},
tags = {testing, design},
researchr = {https://researchr.org/publication/OyamaKN96},
cites = {0},
citedby = {0},
pages = {453-460},
booktitle = {Proceedings IEEE International Test Conference 1996, Test and Design Validity, Washington, DC, USA, October 20-25, 1996},
publisher = {IEEE Computer Society},
isbn = {0-7803-3541-4},
}