A placement strategy for reducing the effects of multiple faults in digital circuits

Samuel N. Pagliarini, Dhiraj K. Pradhan. A placement strategy for reducing the effects of multiple faults in digital circuits. In 2014 IEEE 20th International On-Line Testing Symposium, IOLTS 2014, Platja d'Aro, Girona, Spain, July 7-9, 2014. pages 69-74, IEEE, 2014. [doi]

Authors

Samuel N. Pagliarini

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Dhiraj K. Pradhan

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