Application of Formal Methods for System-Level Verification of Network on Chip - researchr publication authors

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Vinitha Arakkonam Palaniveloo, Arcot Sowmya. Application of Formal Methods for System-Level Verification of Network on Chip. In IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2011, 4-6 July 2011, Chennai, India. pages 162-169, IEEE Computer Society, 2011. [doi]

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