Vinitha Arakkonam Palaniveloo, Arcot Sowmya. Application of Formal Methods for System-Level Verification of Network on Chip. In IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2011, 4-6 July 2011, Chennai, India. pages 162-169, IEEE Computer Society, 2011. [doi]
@inproceedings{PalanivelooS11,
title = {Application of Formal Methods for System-Level Verification of Network on Chip},
author = {Vinitha Arakkonam Palaniveloo and Arcot Sowmya},
year = {2011},
doi = {10.1109/ISVLSI.2011.57},
url = {http://dx.doi.org/10.1109/ISVLSI.2011.57},
researchr = {https://researchr.org/publication/PalanivelooS11},
cites = {0},
citedby = {0},
pages = {162-169},
booktitle = {IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2011, 4-6 July 2011, Chennai, India},
publisher = {IEEE Computer Society},
}