Efficient Implementation of Scan Register Insertion on Integer Arithmetic Cores for FPGAs - researchr publication

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Ayan Palchaudhuri, Anindya Sundar Dhar. Efficient Implementation of Scan Register Insertion on Integer Arithmetic Cores for FPGAs. In 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, VLSID 2016, Kolkata, India, January 4-8, 2016. pages 433-438, IEEE Computer Society, 2016. [doi]

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