Compressing Cache State for Postsilicon Processor Debug

Preeti Ranjan Panda, M. Balakrishnan, Anant Vishnoi. Compressing Cache State for Postsilicon Processor Debug. IEEE Transactions on Computers, 60(4):484-497, 2011. [doi]

Authors

Preeti Ranjan Panda

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M. Balakrishnan

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Anant Vishnoi

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