Preeti Ranjan Panda, M. Balakrishnan, Anant Vishnoi. Compressing Cache State for Postsilicon Processor Debug. IEEE Transactions on Computers, 60(4):484-497, 2011. [doi]
@article{PandaBV11,
title = {Compressing Cache State for Postsilicon Processor Debug},
author = {Preeti Ranjan Panda and M. Balakrishnan and Anant Vishnoi},
year = {2011},
doi = {10.1109/TC.2010.123},
url = {http://dx.doi.org/10.1109/TC.2010.123},
tags = {caching, debugging},
researchr = {https://researchr.org/publication/PandaBV11},
cites = {0},
citedby = {0},
journal = {IEEE Transactions on Computers},
volume = {60},
number = {4},
pages = {484-497},
}