Low Power Technology Mapping for LUT based FPGA A Genetic Algorithm Approach - researchr publication

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Rohit Pandey, Santanu Chattopadhyay. Low Power Technology Mapping for LUT based FPGA A Genetic Algorithm Approach . In 16th International Conference on VLSI Design (VLSI Design 2003), 4-8 January 2003, New Delhi, India. pages 79-84, IEEE Computer Society, 2003. [doi]

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