HPAM: An 8-bit High-Performance Approximate Multiplier Design for Error Resilient Applications

Divy Pandey, Vishesh Mishra, Saurabh Singh, Sagar Satapathy, Babita Jajodia, Dip Sankar Banerjee. HPAM: An 8-bit High-Performance Approximate Multiplier Design for Error Resilient Applications. In 23rd International Symposium on Quality Electronic Design, ISQED 2022, Santa Clara, CA, USA, April 6-7, 2022. pages 1-5, IEEE, 2022. [doi]

Authors

Divy Pandey

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Vishesh Mishra

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Saurabh Singh

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Sagar Satapathy

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Babita Jajodia

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Dip Sankar Banerjee

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