3D-TemPo: Optimizing 3-D DRAM Performance Under Temperature and Power Constraints

Shailja Pandey, Sayam Sethi, Preeti Ranjan Panda. 3D-TemPo: Optimizing 3-D DRAM Performance Under Temperature and Power Constraints. IEEE Trans. on CAD of Integrated Circuits and Systems, 43(8):2263-2276, August 2024. [doi]

@article{PandeySP24-0,
  title = {3D-TemPo: Optimizing 3-D DRAM Performance Under Temperature and Power Constraints},
  author = {Shailja Pandey and Sayam Sethi and Preeti Ranjan Panda},
  year = {2024},
  month = {August},
  doi = {10.1109/TCAD.2024.3367235},
  url = {https://doi.org/10.1109/TCAD.2024.3367235},
  researchr = {https://researchr.org/publication/PandeySP24-0},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
  volume = {43},
  number = {8},
  pages = {2263-2276},
}