3D-TemPo: Optimizing 3-D DRAM Performance Under Temperature and Power Constraints

Shailja Pandey, Sayam Sethi, Preeti Ranjan Panda. 3D-TemPo: Optimizing 3-D DRAM Performance Under Temperature and Power Constraints. IEEE Trans. on CAD of Integrated Circuits and Systems, 43(8):2263-2276, August 2024. [doi]

Abstract

Abstract is missing.