A Power-Efficient 24-to-71 GHz CMOS Phased-Array Receiver Utilizing Harmonic-Selection Technique Supporting 36dB Inter-Band Blocker Rejection for 5G NR - researchr publication authors

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Jian Pang, Yi Zhang, Zheng Li, Minzhe Tang, Yijing Liao, Ashbir Aviat Fadila, Atsushi Shirane, Kenichi Okada. A Power-Efficient 24-to-71 GHz CMOS Phased-Array Receiver Utilizing Harmonic-Selection Technique Supporting 36dB Inter-Band Blocker Rejection for 5G NR. In IEEE International Solid-State Circuits Conference, ISSCC 2022, San Francisco, CA, USA, February 20-26, 2022. pages 434-436, IEEE, 2022. [doi]

This author has not been identified. Look up 'Jian Pang' in GoogleThis author has not been identified. Look up 'Yi Zhang' in GoogleThis author has not been identified. It may be one of the following persons:

Zheng Li

Look up 'Zheng Li' in GoogleThis author has not been identified. Look up 'Minzhe Tang' in GoogleThis author has not been identified. Look up 'Yijing Liao' in GoogleThis author has not been identified. Look up 'Ashbir Aviat Fadila' in GoogleThis author has not been identified. Look up 'Atsushi Shirane' in GoogleThis author has not been identified. Look up 'Kenichi Okada' in Google

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