Jian Pang, Yi Zhang, Zheng Li, Minzhe Tang, Yijing Liao, Ashbir Aviat Fadila, Atsushi Shirane, Kenichi Okada. A Power-Efficient 24-to-71 GHz CMOS Phased-Array Receiver Utilizing Harmonic-Selection Technique Supporting 36dB Inter-Band Blocker Rejection for 5G NR. In IEEE International Solid-State Circuits Conference, ISSCC 2022, San Francisco, CA, USA, February 20-26, 2022. pages 434-436, IEEE, 2022. [doi]
@inproceedings{PangZLTLFSO22,
title = {A Power-Efficient 24-to-71 GHz CMOS Phased-Array Receiver Utilizing Harmonic-Selection Technique Supporting 36dB Inter-Band Blocker Rejection for 5G NR},
author = {Jian Pang and Yi Zhang and Zheng Li and Minzhe Tang and Yijing Liao and Ashbir Aviat Fadila and Atsushi Shirane and Kenichi Okada},
year = {2022},
doi = {10.1109/ISSCC42614.2022.9731619},
url = {https://doi.org/10.1109/ISSCC42614.2022.9731619},
researchr = {https://researchr.org/publication/PangZLTLFSO22},
cites = {0},
citedby = {0},
pages = {434-436},
booktitle = {IEEE International Solid-State Circuits Conference, ISSCC 2022, San Francisco, CA, USA, February 20-26, 2022},
publisher = {IEEE},
isbn = {978-1-6654-2800-2},
}