Philipp V. Panitz, Markus Olbrich, Erich Barke, Jürgen Koehl. Robust wiring networks for DfY considering timing constraints. In Hai Zhou, Enrico Macii, Zhiyuan Yan, Yehia Massoud, editors, Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007. pages 43-48, ACM, 2007. [doi]
Abstract is missing.