A 7-bit 1.15-GS/s 2.6-bit/Cycle Asynchronous SAR ADC Using Comparator Decision Skip Technique With Background Offset Calibration - researchr publication

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Sooho Park, Changjoo Kim, Yohan Choi, Minkyun Shim, Woojin Lee, Donghwi Seo, Chulwoo Kim. A 7-bit 1.15-GS/s 2.6-bit/Cycle Asynchronous SAR ADC Using Comparator Decision Skip Technique With Background Offset Calibration. J. Solid-State Circuits, 61(5):2117-2128, May 2026. [doi]

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