A 7MB/s 64Gb 3-bit/cell DDR NAND flash memory in 20nm-node technology

Ki Tae Park, Ohsuk Kwon, Sangyong Yoon, Myung-Hoon Choi, In-Mo Kim, Bo-Geun Kim, Min-Seok Kim, Yoon-Hee Choi, Seung-Hwan Shin, Youngson Song, Joo-Yong Park, Jae-Eun Lee, Chang-Gyu Eun, Ho Chul Lee, Hyeong-Jun Kim, Jun-Hee Lee, Jong-Young Kim, Tae-Min Kweon, Hyun-Jun Yoon, Taehyun Kim, Dong-Kyo Shim, Jongsun Sel, Ji-Yeon Shin, Pansuk Kwak, Jin-Man Han, Keon-Soo Kim, SungSoo Lee, Youngho Lim, Tae-Sung Jung. A 7MB/s 64Gb 3-bit/cell DDR NAND flash memory in 20nm-node technology. In IEEE International Solid-State Circuits Conference, ISSCC 2011, Digest of Technical Papers, San Francisco, CA, USA, 20-24 February, 2011. pages 212-213, IEEE, 2011. [doi]

Abstract

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