Jaehyun Park, Donghwa Shin, Hyung Gyu Lee. Design space exploration of row buffer architecture for phase change memory with LPDDR2-NVM interface. In 2015 IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2015, Daejeon, South Korea, October 5-7, 2015. pages 104-109, IEEE, 2015. [doi]
@inproceedings{ParkSL15a,
title = {Design space exploration of row buffer architecture for phase change memory with LPDDR2-NVM interface},
author = {Jaehyun Park and Donghwa Shin and Hyung Gyu Lee},
year = {2015},
doi = {10.1109/VLSI-SoC.2015.7314400},
url = {http://dx.doi.org/10.1109/VLSI-SoC.2015.7314400},
researchr = {https://researchr.org/publication/ParkSL15a},
cites = {0},
citedby = {0},
pages = {104-109},
booktitle = {2015 IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2015, Daejeon, South Korea, October 5-7, 2015},
publisher = {IEEE},
isbn = {978-1-4673-9140-5},
}