Jaehyun Park, Donghwa Shin, Hyung Gyu Lee. Design space exploration of row buffer architecture for phase change memory with LPDDR2-NVM interface. In 2015 IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2015, Daejeon, South Korea, October 5-7, 2015. pages 104-109, IEEE, 2015. [doi]
Abstract is missing.