CMOS Implementation of Threshold Gates with Hysteresis

Farhad Alibeygi Parsan, Scott C. Smith. CMOS Implementation of Threshold Gates with Hysteresis. In Andreas Burg, Ayse Kivilcim Coskun, Matthew R. Guthaus, Srinivas Katkoori, Ricardo Reis, editors, VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design - 20th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012, Santa Cruz, CA, USA, October 7-10, 2012, Revised Selected Papers. Volume 418 of IFIP Advances in Information and Communication Technology, pages 196-216, Springer, 2012. [doi]

@inproceedings{ParsanS12a,
  title = {CMOS Implementation of Threshold Gates with Hysteresis},
  author = {Farhad Alibeygi Parsan and Scott C. Smith},
  year = {2012},
  doi = {10.1007/978-3-642-45073-0_11},
  url = {http://dx.doi.org/10.1007/978-3-642-45073-0_11},
  researchr = {https://researchr.org/publication/ParsanS12a},
  cites = {0},
  citedby = {0},
  pages = {196-216},
  booktitle = {VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design - 20th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012, Santa Cruz, CA, USA, October 7-10, 2012, Revised Selected Papers},
  editor = {Andreas Burg and Ayse Kivilcim Coskun and Matthew R. Guthaus and Srinivas Katkoori and Ricardo Reis},
  volume = {418},
  series = {IFIP Advances in Information and Communication Technology},
  publisher = {Springer},
  isbn = {978-3-642-45072-3},
}