Thermal Aware Design for Through-Silicon Via (TSV) based 3D Network-on-Chip (NoC) Architectures

Ujjwal Pasupulety, Bheemappa Halavar, Basavaraj Talawar. Thermal Aware Design for Through-Silicon Via (TSV) based 3D Network-on-Chip (NoC) Architectures. In Bijoy Antony Jose, Jimson Mathew, editors, 8th International Symposium on Embedded Computing and System Design, ISED 2018, Cochin, India, December 13-15, 2018. pages 236-240, IEEE, 2018. [doi]

Authors

Ujjwal Pasupulety

This author has not been identified. Look up 'Ujjwal Pasupulety' in Google

Bheemappa Halavar

This author has not been identified. Look up 'Bheemappa Halavar' in Google

Basavaraj Talawar

This author has not been identified. Look up 'Basavaraj Talawar' in Google