Ujjwal Pasupulety, Bheemappa Halavar, Basavaraj Talawar. Thermal Aware Design for Through-Silicon Via (TSV) based 3D Network-on-Chip (NoC) Architectures. In Bijoy Antony Jose, Jimson Mathew, editors, 8th International Symposium on Embedded Computing and System Design, ISED 2018, Cochin, India, December 13-15, 2018. pages 236-240, IEEE, 2018. [doi]
@inproceedings{PasupuletyHT18-0,
title = {Thermal Aware Design for Through-Silicon Via (TSV) based 3D Network-on-Chip (NoC) Architectures},
author = {Ujjwal Pasupulety and Bheemappa Halavar and Basavaraj Talawar},
year = {2018},
doi = {10.1109/ISED.2018.8704109},
url = {https://doi.org/10.1109/ISED.2018.8704109},
researchr = {https://researchr.org/publication/PasupuletyHT18-0},
cites = {0},
citedby = {0},
pages = {236-240},
booktitle = {8th International Symposium on Embedded Computing and System Design, ISED 2018, Cochin, India, December 13-15, 2018},
editor = {Bijoy Antony Jose and Jimson Mathew},
publisher = {IEEE},
isbn = {978-1-5386-6575-6},
}