Mrunal Patel, Shenghsun Cho, Michael Ferdman, Peter Milder. Runtime-Programmable Pipelines for Model Checkers on FPGAs. In Ioannis Sourdis, Christos-Savvas Bouganis, Carlos Álvarez 0001, Leonel Toledo, Pedro Valero-Lara, Xavier Martorell, editors, 29th International Conference on Field Programmable Logic and Applications, FPL 2019, Barcelona, Spain, September 8-12, 2019. pages 51-58, IEEE, 2019. [doi]
Abstract is missing.