ASIC Implimentation of 1 Bit Full Adder

Deepchand Patel, Pravinkumar G. Parate, Prafulla S. Patil, S. Subbaraman. ASIC Implimentation of 1 Bit Full Adder. In First International Conference on Emerging Trends in Engineering and Technology, ICETET '08, Nagpur, Maharashtra, India, July 16-18, 2008. pages 463-467, IEEE Computer Society, 2008. [doi]

Authors

Deepchand Patel

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Pravinkumar G. Parate

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Prafulla S. Patil

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S. Subbaraman

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