Deepchand Patel, Pravinkumar G. Parate, Prafulla S. Patil, S. Subbaraman. ASIC Implimentation of 1 Bit Full Adder. In First International Conference on Emerging Trends in Engineering and Technology, ICETET '08, Nagpur, Maharashtra, India, July 16-18, 2008. pages 463-467, IEEE Computer Society, 2008. [doi]
No references recorded for this publication.
No citations of this publication recorded.