Parasitic-Aware Automatic Analog CMOS Circuit Design Environment

Subhash Jagadishchandra Patel, Rajesh A. Thakker. Parasitic-Aware Automatic Analog CMOS Circuit Design Environment. In 32nd International Conference on VLSI Design and 2019 18th International Conference on Embedded Systems, VLSID 2019, Delhi, India, January 5-9, 2019. pages 245-250, IEEE, 2019. [doi]

Authors

Subhash Jagadishchandra Patel

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Rajesh A. Thakker

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