P. Patil, Tan-Li Chou, Kaushik Roy, R. Roy. Low-Power Driven Logic Synthesis Using Accurate Power Estimation Technique. In 10th International Conference on VLSI Design (VLSI Design 1997), 4-7 January 1997, Hyderabad, India. pages 179-184, IEEE Computer Society, 1997. [doi]
@inproceedings{PatilCRR97,
title = {Low-Power Driven Logic Synthesis Using Accurate Power Estimation Technique},
author = {P. Patil and Tan-Li Chou and Kaushik Roy and R. Roy},
year = {1997},
doi = {10.1109/ICVD.1997.568073},
url = {http://doi.ieeecomputersociety.org/10.1109/ICVD.1997.568073},
tags = {logic},
researchr = {https://researchr.org/publication/PatilCRR97},
cites = {0},
citedby = {0},
pages = {179-184},
booktitle = {10th International Conference on VLSI Design (VLSI Design 1997), 4-7 January 1997, Hyderabad, India},
publisher = {IEEE Computer Society},
}