Low-Power Driven Logic Synthesis Using Accurate Power Estimation Technique - researchr publication

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P. Patil, Tan-Li Chou, Kaushik Roy, R. Roy. Low-Power Driven Logic Synthesis Using Accurate Power Estimation Technique. In 10th International Conference on VLSI Design (VLSI Design 1997), 4-7 January 1997, Hyderabad, India. pages 179-184, IEEE Computer Society, 1997. [doi]

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