A dual-mode architecture for a phased-array receiver based on injection locking in 0.13µm CMOS

Satwik A. Patnaik, Narasimha Lanka, Ramesh Harjani. A dual-mode architecture for a phased-array receiver based on injection locking in 0.13µm CMOS. In IEEE International Solid-State Circuits Conference, ISSCC 2009, Digest of Technical Papers, San Francisco, CA, USA, 8-12 February, 2009. pages 490-491, IEEE, 2009. [doi]

Abstract

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